MARKETS

Semiconductor Test

It’s become increasingly difficult to manage the heat encountered during IC tests. Absent the proper mitigations, it’s easy to generate so much heat that chips can literally burn up. In addition, these thermal interfaces must be able to handle repeated use with minimal wear.

The Status Quo
vs. Carbice

THERMAL MANAGEMENT PERFORMANCE
RELIABILITY
COST OF OWNERSHIP REDUCTION
SUSTAINABILTY
DESIGN INNOVATION
STATUS QUO
  • More testing power
  • Faster testing speeds
  • Smaller dies
  • No sufficient TIM
  • Overheating
  • Chip stains w TIM
  • Chip mars w/o TIM
  • TIM generates debris
  • Chip fails with temp overshoot
  • Unreliable test & chip yield loss
  • No sufficient TIM
  • Bigger heat sinks
  • Temp overshoot
  • More chip yield loss
  • Higher costs
  • No sufficient TIM
  • Chip damage from test
  • Frequent change-outs
  • Longer heating and cooling
  • More emission & waste
  • No sufficient TIM
  • Narrows temp range
  • Lowers testing speed
  • Reduces chip yield
  • Requires pedestals
  • Limits testing system
CARBICE
Provides reliable heat dissipation over broad temperature range (-55 – 175°C) and pressure range (2.5 – 150 psi). Fast response minimizes temperature overshoot of small dies. Verified performance consistency over 1 million make/break testing cycles.
Carbice® Pads don’t stain chips or create debris. Carbice Nanotube forest acts as a shock absorber to protect chips from marring. Carbice Pads maintain reliable thermal performance and structural integrity over 1 million make/break testing cycles.
Stable over the entire temperature range, allow repeated make/break. Resulting increase in chip production throughput and reduced chip yield loss from temperature overshoot lowers cost.
Built to last, from recycled Al and waste gas, reusable and recyclable. More insertion cycles with Carbice Contact Pad™ means less material waste and a more responsible & sustainable solution.
Enables the full temperature range of a tester allowing innovative system design. Shock absorption capability protects chip damage and eliminates the need for pedestals.
Case Study
Automated Semiconductor Testing
Case Study
Automated Semiconductor Testing

Contact Pad™ cools reliably for Semiconductor Testing

The challenge of heat management during semiconductor testing

Chips produce more heat and are less capable to dissipate heat in a tester:

  • Higher power applied during testing generates excessive heat
  • No conventional TIM survives repeated make/break chip insertion causing less heat dissipation
  • Slows down testing throughput and lowers chip yields
     

Meet Contact Pad

Contact Pad is the durable Carbice® Pad designed to provide reliable cooling where conventional TIMs experience extreme wear-and-tear: 

  • Addresses challenging contact scenarios like make-n-break and sliding
  • Maintains reliable long-term thermal performance 
  • Provides fast heat transfer to allow reliable temperature control
     

Carbice Contact Pad mounted on automated testing equipment.

Results
We tested the durability of Contact Pad during automated make-n-break cycles and found that Contact Pad:

  • Maintained low thermal resistance
  • Allowed reliable heat control during thermomechanical cycles
  • Consistent for over 1,000,000 make/break cycles
  • Does NOT produce debris/foreign material
     

Durability of Contact Pad during automated make-n-break testing cycles

 

Using Contact Pad, customers are able to:

  • Design new semiconductor testing systems 
  • Launch new products faster, at lower cost
Advanced thermal interface materials are becoming a critical component to achieve performance and secure the supply chain.
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